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<head><meta charset="utf-8"><title>Aarch64 LLVM bug · project-portable-simd · Zulip Chat Archive</title></head>
<h2>Stream: <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/index.html">project-portable-simd</a></h2>
<h3>Topic: <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html">Aarch64 LLVM bug</a></h3>

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<a name="232658366"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232658366" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232658366">(Mar 31 2021 at 20:18)</a>:</h4>
<p>Moving discussion here regarding the LLVM bug</p>



<a name="232658386"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232658386" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232658386">(Mar 31 2021 at 20:18)</a>:</h4>
<p>I seem to have been able to produce a fairly minimal test that fails to compile:</p>



<a name="232658395"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232658395" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232658395">(Mar 31 2021 at 20:18)</a>:</h4>
<div class="codehilite"><pre><span></span><code>#[test]
fn is_normal() {
    assert!(core_simd::SimdF32::&lt;64&gt;::splat(0.).is_normal().to_array()[0]);
}
</code></pre></div>



<a name="232658457"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232658457" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232658457">(Mar 31 2021 at 20:19)</a>:</h4>
<p>it _only_ fails with lane counts of 64, I think</p>



<a name="232660162"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232660162" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232660162">(Mar 31 2021 at 20:30)</a>:</h4>
<div class="codehilite"><pre><span></span><code>#[test]
fn bug() {
    use core_simd::{SimdF32, SimdU32};
    let v = SimdF32::&lt;64&gt;::splat(0.);
    let m = v.lanes_eq(SimdF32::splat(0.0)) &amp; v.lanes_eq(SimdF32::splat(0.0));
    assert!(m.to_array()[0]);
}
</code></pre></div>



<a name="232660187"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232660187" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232660187">(Mar 31 2021 at 20:31)</a>:</h4>
<p>An even more reduced form</p>



<a name="232666910"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232666910" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Jubilee <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232666910">(Mar 31 2021 at 21:19)</a>:</h4>
<p>interesting</p>



<a name="232667149"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232667149" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232667149">(Mar 31 2021 at 21:21)</a>:</h4>
<p>I can't really get it simpler than this, so I'm going to try building rustc with LLVM assertions enabled</p>



<a name="232681899"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232681899" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232681899">(Mar 31 2021 at 23:34)</a>:</h4>
<p>I've been able to get it down to a ~50 line self contained example</p>



<a name="232681901"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232681901" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232681901">(Mar 31 2021 at 23:34)</a>:</h4>
<p><a href="https://github.com/calebzulawski/llvm-aarch64-codegen-crash/blob/master/src/lib.rs">https://github.com/calebzulawski/llvm-aarch64-codegen-crash/blob/master/src/lib.rs</a></p>



<a name="232681966"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232681966" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232681966">(Mar 31 2021 at 23:35)</a>:</h4>
<p>I've also figured out it only happens when building tests, I can't seem to replicate the bug within the crate itself</p>



<a name="232682012"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232682012" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232682012">(Mar 31 2021 at 23:35)</a>:</h4>
<p>I also built rustc and the aarch64 std and it's not triggering any assertions</p>



<a name="232682674"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232682674" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Jubilee <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232682674">(Mar 31 2021 at 23:43)</a>:</h4>
<p>hmmm</p>



<a name="232682773"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232682773" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Jubilee <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232682773">(Mar 31 2021 at 23:44)</a>:</h4>
<p><span class="user-mention" data-user-id="312331">@Caleb Zulawski</span> so you can write the buggy code and push it into an executable crate and run it directly but it doesn't happen unless libtest is involved?</p>



<a name="232682845"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232682845" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232682845">(Mar 31 2021 at 23:45)</a>:</h4>
<p>Oh wait, I just realized since it's generic it didn't actually do any codegen</p>



<a name="232682861"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232682861" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232682861">(Mar 31 2021 at 23:46)</a>:</h4>
<p>That may be why</p>



<a name="232682958"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232682958" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Jubilee <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232682958">(Mar 31 2021 at 23:46)</a>:</h4>
<p>hehe</p>



<a name="232682969"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232682969" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Jubilee <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232682969">(Mar 31 2021 at 23:47)</a>:</h4>
<p>yeah, force it to run somehow.</p>



<a name="232682984"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232682984" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Jubilee <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232682984">(Mar 31 2021 at 23:47)</a>:</h4>
<p>print statements are very good for this.</p>



<a name="232683440"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232683440" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232683440">(Mar 31 2021 at 23:52)</a>:</h4>
<p>Actually, even with forcing it to codegen I can't seem to get it to error outside of a test</p>



<a name="232688245"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232688245" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Jubilee <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232688245">(Apr 01 2021 at 00:51)</a>:</h4>
<p>hmm</p>



<a name="232688737"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232688737" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232688737">(Apr 01 2021 at 00:59)</a>:</h4>
<p>I can't figure out any way to generate llvm IR from a test?</p>



<a name="232688816"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232688816" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232688816">(Apr 01 2021 at 01:00)</a>:</h4>
<p>Maybe I can generate the LLVM for the x86-64 target and expect it's the same?</p>



<a name="232690560"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232690560" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Jubilee <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232690560">(Apr 01 2021 at 01:24)</a>:</h4>
<p>hmm idk</p>



<a name="232690693"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232690693" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Thom Chiovoloni <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232690693">(Apr 01 2021 at 01:26)</a>:</h4>
<p>try using -Csave-temps and using the .bc files it creates (which are equivalent to IR)</p>



<a name="232690750"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232690750" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232690750">(Apr 01 2021 at 01:27)</a>:</h4>
<p>Since the aarch64 crashes do we think we can use x86-64?</p>



<a name="232693243"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232693243" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Thom Chiovoloni <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232693243">(Apr 01 2021 at 02:04)</a>:</h4>
<p>you could try, but i'd guess not. or at least, it would depend on how far along it compiled. -Csave-temps should have output even if it crashes though</p>
<p>you should ask in the wg-llvm zulip, though</p>



<a name="232817493"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232817493" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Jubilee <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232817493">(Apr 01 2021 at 20:09)</a>:</h4>
<p>yeah I think that thread should have enough information to follow up on this? or at least extracting some slightly differential LLVMIRs</p>



<a name="232964822"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232964822" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232964822">(Apr 02 2021 at 23:43)</a>:</h4>
<p>Little bit of an update on this, the problem is in the thin LTO optimization pass.  The problem with this is there is no way to run this optimization pass with <code>opt</code> on the CLI, though it may be possible to utter the correct incantation to produce something relatively similar that reproduces the error (without rustc)</p>



<a name="232964935"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232964935" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232964935">(Apr 02 2021 at 23:45)</a>:</h4>
<p>One interesting thing to point out is that we could conceivably temporarily avoid the bug by limiting vector widths to 32 instead of 64, which would be disappointing for AVX 512</p>



<a name="232967524"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232967524" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Caleb Zulawski <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232967524">(Apr 03 2021 at 00:31)</a>:</h4>
<p>Hey, I got it to segfault with just an llvm bytecode file and <code>opt</code>!</p>



<a name="232971609"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/257879-project-portable-simd/topic/Aarch64%20LLVM%20bug/near/232971609" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Jubilee <a href="https://rust-lang.github.io/zulip_archive/stream/257879-project-portable-simd/topic/Aarch64.20LLVM.20bug.html#232971609">(Apr 03 2021 at 01:50)</a>:</h4>
<p>nice!</p>



<hr><p>Last updated: Aug 07 2021 at 22:04 UTC</p>
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